Preliminary Material Review: MOSFET Resistance Calculations

• Review of handout 37/36 slide 27 calculations for silicon MOSFET resistances
• Three resistor components analyzed:
  • Contact resistance: 100 ohms (calculated from specific contact resistivity 2.5×10⁻⁷ ohm-cm² and contact area 0.25×10⁻⁸ cm²)
  • Silicide sheet resistance: ~1.9 ohms (3.75 ohms/square × 0.5 squares)
  • Source-drain extension resistance: 10 ohms (100 ohms/square × 0.1 squares)
• Contact resistance dominates total resistance
• Solution requires scaling specific contact resistivity per ITRS roadmap (2×10⁻⁷ target for 2003)

Silicon-Germanium Alloy Applications

• Heterojunction bipolar transistors (HBTs): 10+ years in production
  • Base layer applications in high-frequency analog/telecommunications
  • Multiple companies manufacturing commercially
• Strain engineering for CMOS enhancement: Recently entering production
  • Intel Pentium using strained silicon technology
  • Relaxed SiGe/strained Si layers for mobility enhancement
• Boron diffusion barrier applications
  • 20% Ge reduces boron diffusivity by factor of 10
• Micromachining etch-stop applications
• Polycrystalline SiGe gate materials (research phase)
• Infrared photodetector integration
• SiGeC for transient enhanced diffusion suppression in HBTs

MOSFET Performance Enhancement Motivation

• Gate delay inversely proportional to drain current
• Drain current equation: ID ∝ μ × Cox × (W/L) × (VG-VT)
• Conventional scaling approaches reaching limits:
  • Gate oxide thickness: approaching atomic limits (~10 Å)
  • Gate length: lithographic/electrostatic challenges
  • Mobility: last remaining optimization parameter
• Modern MOSFETs operate at ~1 MV/cm effective field
• Electron mobility degraded from ~400 to ~200-300 cm²/V-s due to scaling

Strain Engineering Fundamentals

• Biaxial tensile strain in silicon enhances electron mobility
• Epitaxial growth methods for strain introduction:
  • Strained SiGe on Si (compressive)
  • Strained Si on relaxed SiGe (tensile)
• Alternative strain methods:
  • Shallow trench isolation (STI) stress
  • Source/drain recess with SiGe fill
  • High-stress nitride films
  • Mechanical wafer bending

Band Structure and Physics

• SiGe bandgap reduction: ~150 meV at 20% Ge (strained)
• Band alignment differences:
  • Strained SiGe on Si: valence band offset dominant
  • Strained Si on relaxed SiGe: conduction band offset present
• Strain-induced valley splitting in silicon:
  • Breaks cubic symmetry
  • Two-fold degenerate lower energy valleys
  • Reduced intervalley scattering
  • Enhanced mobility through scattering time increase

Mobility Enhancement Results

• Electron mobility improvements:
  • Surface channel: ~80% enhancement (factor of 1.8)
  • Buried channel: higher at low fields, degraded at high fields
• Manufacturing-style process results (IBM):
  • 100% electron mobility improvement at low bias
  • Minimal improvement at high effective fields
• Strain dependence:
  • Saturation behavior above ~20% Ge for electrons
  • Hole mobility requires >30% Ge for significant enhancement
• Performance scaling: enhancement factors maintained down to ~100 nm gate lengths

Material Growth and Processing

• Epitaxial growth techniques:
  • Low-pressure CVD or UHV-CVD
  • Gas sources: silane (SiH₄), germane (GeH₄), diborane, arsine
  • Selective deposition requires HCl addition
  • SiGeC uses methylsilane for carbon incorporation
• Critical thickness considerations:
  • Temperature-dependent kinetic limitations
  • Metastable regime existence
  • 20% Ge: ~120 Å equilibrium, ~700 Å metastable at 550°C

Relaxed SiGe Buffer Layers

• Graded buffer layer breakthrough (early 1990s):
  • Threading dislocation density reduction: 10⁹ to <10⁵ cm⁻²
  • Compositional grading over several microns
  • High-temperature growth for dislocation mobility
• Material quality issues:
  • Cross-hatch surface morphology from buried strain fields
  • Lithographic challenges from surface undulations
  • Island growth mode at excessive temperatures

Dopant Diffusion in SiGe

• Boron diffusion suppression: factor of 6-10 reduction in 20% SiGe
• Arsenic diffusion enhancement: approaches boron diffusion rate
• Phosphorus: factor of 2-3 enhancement
• Junction depth control challenges:
  • Arsenic junctions 2× deeper in SiGe vs Si
  • Optimization required for activation vs. diffusion
• Germanium self-diffusion:
  • Exponential increase with Ge content
  • Interdiffusion concerns for channel contamination
  • Vacancy-mediated mechanism indicated

Strain Characterization

• Raman spectroscopy for strain measurement:
  • Peak shift from 521 cm⁻¹ (unstrained Si)
  • ~6-7 cm⁻¹ shift for Si on 20% SiGe substrate
  • Strain preservation through oxidation processes
• Metrology challenges for thin layers (<100 Å)

Silicon-Germanium on Insulator (SGOI)

• Multiple formation approaches:
  • SIMOX-like oxygen implantation (limited to <15% Ge)
  • Germanium condensation during oxidation
  • Bond and etch-back processes
  • Smart-cut with hydrogen implantation
• Advantages: elimination of threading dislocations and substrate effects

Strained Silicon on Insulator (SSOI)

• Direct transfer of strained Si layer
• Complete removal of SiGe substrate
• Eliminates Ge diffusion concerns
• MIT demonstration: strain preservation after SiGe removal
• Commercial availability: Soitec 300mm SSOI wafers announced
• Processing compatibility with standard SOI flows

Course Evaluation

• Student course evaluations to be completed at lecture end
• Final lecture material not in textbook
• Research-level content on emerging semiconductor materials